Intel® Xeon Phi™ Coprocessor
Developer Training Event
Stanford, CA
Event Details:
Monday, November 10, 2014
Registration Begins: 8:30 AM
Presentation: 9:00 AM to 4:00 PM
Lunch will be provided
Stanford University
Redwood Hall, Room G-10
243 Panama Street - Jordan Quad
Stanford, CA 94305
Please complete a very brief pre-training questionnaire at the following URL:
http://www.colfax-intl.com/nd/svy.aspx?rsfo
This one-day training will provide software developers the foundation needed for modernizing their code to take advantage of parallel architectures found in both the Intel® Xeon® processor and the Intel® Xeon Phi™ coprocessor.
The session will cover: